CompuLab SBC-X270 Bedienungsanleitung Seite 33

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SB-X270 PC/104+ Single Board Computer
CompuLab LTD.
33
4. Functions Implemented on the SB-X270
Most of the functions are implemented by the attached CM-X270 module, while the SB-
X270 board provides connectors or headers. Several additional functions are implemented
on the SB-X270 itself and are described in this section.
Note: The SB-X270 uses a CPLD (programmable logic IC) in order to implement
combinatory logic functionality. This is done in order to reduce component count and add
some flexibility to the design. The usage of a CPLD is not obligatory and can be replaced
by discrete logic IC’s. The internal design description of the CPLD is attached to the SB-
X270 schematics package.
4.1. PC/104 and IDE addressing and logic
The SB-X270 implements address decoding logic by GPCS and IDE-CS signals from the
CM-X270 for driving a number of control signals (OE#, WE#, CS#) to the PC/104 and
IDE buses. Below is a memory address map for the above buses and relevant active control
signals:
Description Address range Active control signals
PC/104 memory
access region
0x0C000000-0x0CFFFFFF ISA-RD#, ISA-WR#
PC/104 IO access
region
0x0D000000-0x0DFFFFFF ISA-IOR#, ISA-IOW#
IDE CS1 region 0x0E000000-0x0EFFFFFF IDE-CS#1, IDE-RD#, IDE-WR#
IDE CS0 region 0x0F000000-0x0FFFFFFF IDE-CS#0, IDE-RD#, IDE-WR#
4.2. PC-Card CardBus socket
The SB-X270 implements a custom solution allowing usage of standard 32bit CardBus
cards without a need for dedicated CardBus controller.
The cards are connected directly to the PCI bus and dedicated logic blocks the CB-
FRAME# signal during irrelevant PCI configuration cycles. The O/S drivers have been
slightly modified but, in general, the solution acts as a standard CardBus interface. The
CARDBUS-CTL signal is used to control the CB-FRAME# blocking. Please refer to the
SB-X270 schematics for implementation details. Only 3.3V PC-Cards are supported.
NOTE: this solution does not allow card insertion/removal (hot-plug) while the system is
powered.
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